One or more aspects of exemplary embodiments in accordance with inventive concepts relate to a semiconductor memory device, and more particularly, to a charge pump circuit of a phase change memory device, which is capable of improving charge pumping efficiency, and devices including the same.
A phase change memory is formed of a phase change material, such as a chalcogenide alloy, which may be maintained in one of two states, depending, for example, upon the rate at which it is heated and cooled. The two states, which may exhibit relatively low and high resistance, may correspond, respectively, to a crystalline state and an amorphous state, for example.
A phase change memory cell may store information using the difference between resistance values of memory element. The resistance values may correspond to the physical phase (that is, crystalline or amorphous) of the phase change material. Thus, the crystalline state may be defined as a set state or data ‘0’, and the amorphous state may be defined as a reset state or data ‘1,’ for example.
A phase change memory device may use a pump circuit to change a program current or voltage to be applied to the memory element thereof. A pump circuit may operate on a power supply voltage to generate a desired operating voltage, which may be higher than the power supply voltage.
There are various embodiments of pump circuits. A pump circuit may, for example, use a clock signal (hereinafter, referred to as a ‘boosting clock signal’) to generate an operating voltage, which may be referred to herein as a programming voltage, from a power supply voltage. The pumping circuit may perform a pump operation according to a cycle of a boosting clock signal, the pulse width of which is maintained constant while the pump circuit is activated.
However, when such a pump circuit switches from an activated mode to a deactivated mode, the boosting clock signal may have an insufficient pulse width. When the boosting clock signal does not have a sufficient pulse width, a pump enable signal indicating whether the pump circuit is activated may be changed from the activated mode, represented, for example, by a logic ‘high’, to the deactivated mode, represented, for example, by a logic ‘low’. That is, if the pulse width of the boosting clock signal is not sufficient, the pump operation may be discontinued, thus causing a charge loss. With charge loss, a low sink current or a low programming voltage may be applied to the memory element, thereby degrading the performance of the pump operation and the phase change memory device.